A New Approach to Design Low Power Cmos Flash A/d Converter

The present investigation proposes an efficient low power encoding scheme intended for a flash analog to digital converter. The designing of a thermometer code to binary code is one of the challenging issues in the design of a high speed low power flash ADC. An encoder circuit translates the thermometer code into the intermediate gray code to reduce the effects of bubble errors. The implementation of the encoder through pseudo NMOS logic is presented. To maintain the high speed with low power dissipation, CMOS inverter has been used as a comparator and by adjusting the ratio of channel width and length, the switching threshold of the CMOS inverter is varied to detect the input analog signal. To maintain the high speed with low power dissipation, the implementation of the ADC through pseudo NMOS logic. The proposed ADC is designed using micro technology in 5 V power supply using PSPICE tool.